Design of a 50-Gb/s SOI-Based DPSK Demodulator for Dense Photonic Integration

A silicon-on-insulator (SOI)-based Mach-Zehnder delay interferometer fabricated in a 220-nm height and 500-nm width SOI strip waveguide technology is presented. The delay line length of 20 ps in the interferometer is optimized to a data rate of 50 Gb/s. The measured insertion loss of the device is 16 dB, including the facet losses. At the output of the demodulator, an approximately 20-dB extinction ratio is achieved. Low bit error rate (BER) measurement (10^-9) is reached for a demodulated signal with an optical-signal-to-noise ratio of 15.8 dB at the photodetector. Error-free performance (BER<; 10^-9) of the SOI-based DPSK demodulator is experimentally demonstrated at 50 Gb/s.