First Demonstration of Hybrid CMOS Imagers With Simultaneous Very Low Crosstalk and High-Broadband Quantum Efficiency

One key challenge in the development of backside-illuminated CMOS imagers is to keep crosstalk (XT) low while enabling high quantum efficiency (QE). In this paper, the tradeoff between XT and QE is optimized and demonstrated in two ways. First, a novel optimized two-step graded EPI was developed and implemented, giving excellent QE and XT data. Second, in other imagers, pixel-separating trenches were employed to eliminate XT, although at the cost of reduced QE × fill factor. Finally, to accurately evaluate the XT performance, an innovative on-chip slanted light shield was implemented on the imager array periphery, eliminating the need for a complex XT characterization setup.