High Power Digitally-Controlled SOI CMOS Attenuator With Wide Attenuation Range

An attenuator is presented in a 0.13 μm silicon-on-insulator (SOI) CMOS technology, to be used for power control of RF wireless transmitters. The design is based on a T-network consisting of two series switches and 63 shunt switches. A gate switching technique is utilized in the series switches for high power handling and high isolation. Measurements at 1.88 GHz show that the minimum insertion loss is as low as 0.6 dB and maximum attenuation is 55.3 dB with worst input return loss of 8.1 dB. The attenuation can be digitally controlled in steps of around 1 dB. The 1 dB gain compression point is as high as 21.0 dBm in the through mode.