Efficient computation of frequency-dependent parameters for on-chip interconnects via two-dimensional FDTD and time signal prediction technique

An efficient two-dimensional finite difference time domain (2-D-FDTD) method combined with time signal prediction technique has been proposed for the frequency-dependent parameters computation of on-chip interconnects in high-speed integrated circuits (ICs). A graded mesh algorithm and lossy absorbing boundary condition are proposed and adopted in the 2-D FDTD analysis to reduce the number of spatial grid points in the simulation region. The introduction of time signal prediction technique to predict the future signal in the time domain or extract the parameters in the frequency domain of uniform transmission lines reduces the computation time drastically. With these, the substrate and conductor losses are both included in one analysis. This algorithm leads to a significant reduction in CPU time and storage requirements as compared with the conventional FDTD. The simulation results are in good agreement with the results obtained by other methods and measurements