DocumentCode :
1267599
Title :
TSC-error C/D circuits for SEC/DED product codes
Author :
Gaitanis, N.
Author_Institution :
Comput. Dept., Nat. Res. Centre Domokritos, Athens, Greece
Volume :
135
Issue :
5
fYear :
1988
fDate :
9/1/1988 12:00:00 AM
Firstpage :
253
Lastpage :
258
Abstract :
A new design technique for totally self-checking (TSC) error correcting/detecting (C/D) circuits of single-error correcting double-error detecting (SEC/DED) product codes is described. The structure of these circuits achieves concurrent fault detection and location under normal input conditions. A separate internal fault (IF) indication is provided. This improves the reliability, maintainability and availability of the entire fault-tolerant system, because faults are detected and repaired before the appearance of input errors. The above error C/D circuits are composed of TSC error detectors, error locators, and error correctors. These circuits are two-rail TSC checkers, and are designed using an algebraic approach.
Keywords :
codecs; error correction codes; error detection codes; fault tolerant computing; logic circuits; SEC/DED product codes; concurrent fault detection; digital circuits; error correcting circuits; error detecting circuits; error locators; fault-tolerant system; internal fault indications; totally self-checking checkers; two-rail TSC checkers;
fLanguage :
English
Journal_Title :
Computers and Digital Techniques, IEE Proceedings E
Publisher :
iet
ISSN :
0143-7062
Type :
jour
Filename :
6536
Link To Document :
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