DocumentCode :
1267933
Title :
A module generator for optimized CMOS buffers
Author :
Al-Khalili, Asim J. ; Zhu, Yi ; Al-Khalili, Dhamin
Author_Institution :
Dept. of Electr. & Comput. Eng., Concordia Univ., Montreal, Que., Canada
Volume :
9
Issue :
10
fYear :
1990
fDate :
10/1/1990 12:00:00 AM
Firstpage :
1028
Lastpage :
1046
Abstract :
The theory and implementation of a module generator for CMOS buffers are presented. The generator is written in the C language, and outputs optimal buffer designs in respect to a preselected objective function and layout. The user has the choice of minimizing delay, power, and area, or a combination of these, plus the choice of layout configuration. The research concentrates mainly on theoretical analysis, where variations of process, design, and layout parameters with respect to each objective function are studied in detail
Keywords :
CMOS integrated circuits; buffer circuits; circuit layout CAD; integrated logic circuits; C language; CAD; CMOS buffers; computer aided design; layout configuration; layout parameters; module generator; optimal buffer designs; preselected objective function; Circuit optimization; Circuit synthesis; Delay estimation; Design automation; Design optimization; Inverters; Military computing; Parasitic capacitance; Process design; Semiconductor device modeling;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/43.62730
Filename :
62730
Link To Document :
بازگشت