DocumentCode :
1268197
Title :
A Physical Model of the Temperature Dependence of the Current Through \\hbox {SiO}_{2}\\hbox {/}\\hbox {HfO}_{2} Stacks
Author :
Vandelli, L. ; Padovani, A. ; Larcher, L. ; Southwick, R.G., III ; Knowlton, W.B. ; Bersuker, G.
Author_Institution :
DISMI, Univ. di Modena e Reggio Emilia, Reggio Emilia, Italy
Volume :
58
Issue :
9
fYear :
2011
Firstpage :
2878
Lastpage :
2887
Abstract :
In this paper, we investigate the characteristics of the defects responsible for the leakage current in the SiO2 and SiO2/HfO2 gate dielectric stacks in a wide temperature range (6 K-400 K). We simulated the temperature dependence of the I -V characteristics both at positive and negative gate voltages by applying the multiphonon trap-assisted tunneling model describing the charge transport through the dielectric. In the depletion/weak inversion regime, the current is limited by the supply of carriers available for tunneling. In strong inversion, the temperature dependence is governed by the charge transport mechanisms through the stacks; in particular, in SiO2/HfO2 dielectric stacks, the coupling of the injected carriers with the dielectric phonons at the trap sites is the dominant mechanism. Matching the simulation results to the measurement data allows extracting important trap parameters, e.g., the trap relaxation and ionization energies, which identify the atomic structure of the electrically active defects in the gate dielectric.
Keywords :
MOSFET; carrier mobility; crystal defects; hafnium compounds; high-k dielectric thin films; leakage currents; phonon-phonon interactions; semiconductor device measurement; semiconductor device models; silicon compounds; tunnelling; SiO2-HfO2; carrier injection; charge transport; depletion-weak inversion regime; electrically active defects; gate dielectric stacks; ionization energy; leakage current; multiphonon trap-assisted tunneling model; negative gate voltages; positive gate voltages; temperature 6 K to 400 K; temperature dependence simulation; trap relaxation; trap sites; Current measurement; Dielectrics; Electron traps; Logic gates; Phonons; Temperature measurement; Dielectric defects; high-$k$; leakage current; modeling; oxide reliability; temperature; trap assisted tunneling;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/TED.2011.2158825
Filename :
5948373
Link To Document :
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