• DocumentCode
    1268203
  • Title

    Three-Dimensional Coaxial Through-Silicon-Via (TSV) Design

  • Author

    Xu, Zheng ; Lu, Jian-Qiang

  • Author_Institution
    IBM Microelectron., Hopewell Junction, NY, USA
  • Volume
    33
  • Issue
    10
  • fYear
    2012
  • Firstpage
    1441
  • Lastpage
    1443
  • Abstract
    Being one of the most attractive 3-D integration solutions, through-silicon-vias (TSVs) electrically connect multiple strata of integrated circuits and/or devices in a vertical fashion. This paper examines the electrical performance of coaxial TSV, which is a new configuration that offers better signal integrity than other TSV structures. Various processing materials and physical geometries are considered for coaxial TSV designs. The full-wave extraction and empirical calculations show good agreement in TSV passive elements (RLGC). Latency, power, and crosstalk are evaluated and compared between coaxial TSVs and common signal-ground (S-G) paired TSVs. Furthermore, a wideband SPICE model is established to well fit the coaxial TSV fullwave solution, facilitating 3-D system design and evaluation.
  • Keywords
    SPICE; integrated circuit design; integrated circuit modelling; three-dimensional integrated circuits; 3D coaxial TSV Design; RLGC; S-G paired TSV; SPICE model; TSV passive elements; full-wave extraction; physical geometries; processing materials; signal-ground paired TSV; three-dimensional coaxial through-silicon-via design; through-silicon-via integrated circuits; Conductivity; Conductors; Crosstalk; Silicon; Solid modeling; Substrates; Through-silicon vias; 3-D integration; Coaxial; RLGC; modeling; parasitics extraction; through-silicon-via (TSV);
  • fLanguage
    English
  • Journal_Title
    Electron Device Letters, IEEE
  • Publisher
    ieee
  • ISSN
    0741-3106
  • Type

    jour

  • DOI
    10.1109/LED.2012.2207703
  • Filename
    6275470