• DocumentCode
    1268304
  • Title

    Tough challenges as design and test go nanometer

  • Author

    Kapur, Rohit ; Williams, Thomas W.

  • Author_Institution
    Synopsys Inc., USA
  • Volume
    32
  • Issue
    11
  • fYear
    1999
  • fDate
    11/1/1999 12:00:00 AM
  • Firstpage
    42
  • Lastpage
    45
  • Abstract
    Test engineers are already hard pressed to ensure the quality of ICs despite ever shorter time to market and skyrocketing test costs. Nanometer technologies will only add to the challenge
  • Keywords
    integrated circuit design; integrated circuit testing; nanotechnology; IC design; IC testing; nanometer technology; Automatic testing; Bridge circuits; Delay; Design engineering; Integrated circuit synthesis; Integrated circuit testing; Logic testing; Manufacturing; Nanoscale devices; Timing;
  • fLanguage
    English
  • Journal_Title
    Computer
  • Publisher
    ieee
  • ISSN
    0018-9162
  • Type

    jour

  • DOI
    10.1109/2.803639
  • Filename
    803639