DocumentCode :
1268938
Title :
A capstone computer engineering design course
Author :
Richard, William D. ; Taylor, David E. ; Zar, David M.
Author_Institution :
Dept. of Electr. Eng., Washington Univ., St. Louis, MO, USA
Volume :
42
Issue :
4
fYear :
1999
fDate :
11/1/1999 12:00:00 AM
Firstpage :
288
Lastpage :
294
Abstract :
This paper describes the senior computer engineering capstone design course at Washington University in St. Louis. As part of this course, three-student teams develop a complete 8-bit microprocessor using a hardware description language (VHDL) and implement their designs in a small FPGA. Programmed FPGAs are “booted” at the end of the course and tested for accuracy. Students also write an assembler or a simple calculator for their microprocessor. This paper describes the microprocessor architecture and tool flow used in the course
Keywords :
computer architecture; computer science education; educational courses; field programmable gate arrays; hardware description languages; 8-bit microprocessor; FPGA; St. Louis; VHDL; Washington University; assembler; capstone computer engineering design course; hardware description language; microprocessor; microprocessor architecture; programmed FPGA; senior computer engineering capstone design course; tool flow; Adders; Arithmetic; Computer architecture; Design engineering; Field programmable gate arrays; Hardware design languages; Microprocessors; Registers; Testing; Very high speed integrated circuits;
fLanguage :
English
Journal_Title :
Education, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9359
Type :
jour
DOI :
10.1109/13.804534
Filename :
804534
Link To Document :
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