DocumentCode :
1269360
Title :
Partitioning logic on graph structures to minimize routing cost
Author :
Vijayan, Gopalakrishnan
Author_Institution :
IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
Volume :
9
Issue :
12
fYear :
1990
fDate :
12/1/1990 12:00:00 AM
Firstpage :
1326
Lastpage :
1334
Abstract :
The problem of partitioning logic onto the vertices of a partition graph G such that the cost of routing the global nets of the partition on the edges of G is minimized is discussed. This is referred to as the min-cost partitioning on a graph (MCPG) problem. The MCPG problem generalizes previously studied partitioning problems, such as classical min-cut, the quadrisection approach, min-cost tree partitioning, and multiple way network partitioning. Some applications of this partitioning model are discussed, a framework for its solution is described, and experimental results are presented
Keywords :
graph theory; logic CAD; network topology; CAD; global nets; graph structures; logic partitioning; min-cost partitioning; partition graph; partitioning model; routeing costs minimisation; Cost function; Delay; Logic design; Process design; Robustness; Routing; Timing; Tree graphs; Very large scale integration;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/43.62777
Filename :
62777
Link To Document :
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