GRASS: an efficient gate re-assignment algorithm for inverter minimisation in post technology mapping

Technology mapping is an important task transforming a multi-level onto a set of library gates. Its primary goal is to achieve a realisable circuit which meets design constraints. Inverter pairs are generally inserted to all internal nodes of a network to increase the flexibility of mapping the subject network onto the library gates, but introducing inverter pairs may also increase the number of unwanted inverters in the mapped network. Thus, inverter minimisation is used during or after technology mapping to reduce the unwanted inverters and to further improve the quality of the mapped network. An efficient gate reassignment algorithm GRASS is presented for minimisation in post technology. Minimisation is achieved by reassigning a gate to one of its NPN-equivalent gates to reduce the number of inverters and/or to use a smaller gate. Simulation results show that GRASS achieves 5.1% area improvement and 5.6% delay improvement for the recommended MCNC benchmark circuits. GRASS also achieves more than 25% inverter reduction over that in a former system