Title :
EmGen-a module generator for logic emulation applications
Author :
Fang, Wen-Jong ; Wu, Allen C -H ; Chen, Duan-Ping
Author_Institution :
Y Explorations Inc., Irvine, CA, USA
Abstract :
Logic emulation is a technique that uses dynamically reprogrammable systems for prototyping and design verification. Using an emulator, designers can realize designs through a software configuration process and perform real-time design verification before fabricating the chip into silicon. However, converting designs into an emulator involves the use of multiphase design tasks, which is a very time-consuming process. Hence, shortening the time to emulation is always the main concern for the logic-emulation design process. One approach to shorten the design processing time is to replace portions of the design with macro cells. This paper presents a module generator for logic-emulation applications, which is able to generate macro cells of arbitrarily complex functions described in hardware descriptive languages. Furthermore, the module generator can effectively generate a multiple field-programmable gate array (FPGA) macro for large macros that cannot fit in a single FPGA chip. Experiments using the module generator for logic emulation are reported. The results demonstrate that the module generator can effectively and efficiently generate complex macros from their register transfer-level description. In addition, the results also show that the design processing time is significantly shortened when the module generation method is incorporated into the logic-emulation design flow.
Keywords :
cellular arrays; field programmable gate arrays; formal verification; hardware description languages; logic CAD; real-time systems; EmGen; arbitrarily complex functions; design processing time; dynamically reprogrammable systems; hardware descriptive languages; logic emulation applications; macro cells; module generator; multiphase design tasks; multiple field-programmable gate array; prototyping; real-time design verification; register transfer-level description; software configuration process; Application software; Emulation; Field programmable gate arrays; Logic design; Process design; Prototypes; Silicon; Software design; Software performance; Software prototyping;
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on