DocumentCode
1271053
Title
On the design of low-voltage, low-power CMOS analog multipliers for RF applications
Author
Debono, Carl James ; Maloberti, Franco ; Micallef, Joseph
Author_Institution
Dipt. di Elettronica, Pavia Univ., Italy
Volume
10
Issue
2
fYear
2002
fDate
4/1/2002 12:00:00 AM
Firstpage
168
Lastpage
174
Abstract
Novel low-voltage, low-power techniques in the design of portable wireless communication systems are required. Two system examples of low-power analog multipliers operating from a 1.2 V supply are presented. These proposed structures achieve the required multiplication function by using current processing. The circuits were fabricated using standard double-poly CMOS processes for a 900 MHz application. Measurement results of the prototypes are comparable to other higher voltage designs.
Keywords
CMOS analogue integrated circuits; UHF integrated circuits; analogue multipliers; land mobile radio; low-power electronics; transceivers; 1.2 V; 900 MHz; CMOS analog multipliers; RF applications; current processing; double-poly CMOS processes; low-power multipliers; low-voltage multipliers; multiplication function; portable wireless communication systems; CMOS process; CMOS technology; Circuits; Energy consumption; Limiting; MOSFETs; Radio frequency; Stacking; Transceivers; Voltage;
fLanguage
English
Journal_Title
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher
ieee
ISSN
1063-8210
Type
jour
DOI
10.1109/92.994995
Filename
994995
Link To Document