Shallow p/sup +/n junctions formed by using a two-step annealing scheme with low thermal budget

Shallow p/sup +/n junctions have been formed by directly implanting BF/sub 2/ dopant into the Si substrate and then treating the samples by an annealing scheme with low thermal budget. A junction leakage smaller than 10 nA/cm/sup 2/ can be achieved by an annealing scheme that employs low-temperature long-time furnace annealing (FA) at 600/spl deg/C for 3 h followed by medium-temperature rapid thermal annealing (RTA) at 800/spl deg/C for 30 s. No considerable dopant diffusion is observed by using this low-thermal-budget annealing process. In addition, a moderate low-temperature annealing time of about 2-3 h should be employed to optimize the shallow p/sup +/n junction formed by this scheme. However, the annealing process that employs medium-temperature RTA followed by low-temperature FA treatment produces worse junctions than the annealing scheme that employs long-time FA at 600/spl deg/C followed by RTA at 800/spl deg/C.