Title :
Statistical device models from worst case files and electrical test data
Author :
Singhal, Kumud ; Visvanathan, V.
Author_Institution :
Innovations for Lucent Technol., Bell Labs., Allentown, PA, USA
fDate :
11/1/1999 12:00:00 AM
Abstract :
Two statistical metal oxide semiconductors (MOS) models are described, one based on worst case files and the other on electrical test data. The former is appropriate for predicting the variability of a process early in its life cycle, while the latter would better track a maturing process. The key statistical tool that is used to develop the models is principal component analysis (PCA), which is used in novel ways in order to derive statistical models from readily available information. The models are used to perform statistical circuit simulation in order to quantitatively predict the impact of manufacturing variations on circuit performance metrics. Due to the use of linear response surface modeling and latin hypercube sampling, the simulation cost of using the models is about the same as with worst case simulation. The modeling technique is general and is applicable to other semiconductor devices besides MOS devices which are considered in this paper
Keywords :
MOS integrated circuits; circuit simulation; design for manufacture; integrated circuit design; integrated circuit modelling; principal component analysis; statistical analysis; surface fitting; MOS models; circuit performance metrics; circuit simulation; electrical test data; latin hypercube sampling; linear response surface modeling; manufacturing variations; maturing process; principal component analysis; process variability; statistical device models; worst case files; Circuit optimization; Circuit simulation; Hypercubes; Predictive models; Principal component analysis; Response surface methodology; Sampling methods; Semiconductor device manufacture; Semiconductor device testing; Virtual manufacturing;
Journal_Title :
Semiconductor Manufacturing, IEEE Transactions on