DocumentCode
1271301
Title
Fabrication of PMOS transistors by dopant implantation into TiSi 2
Author
Barlow, K.J.
Author_Institution
GEC Plessey Semicond., Plymouth, UK
Volume
138
Issue
5
fYear
1991
fDate
10/1/1991 12:00:00 AM
Firstpage
587
Lastpage
589
Abstract
Implantation into TiSi2 and low-temperature annealing have been used to form P+/n junctions and fabricate PMOS transistors. Spreading resistance measurements have shown that shallow, low-resistance junctions can be formed by this method. Dopant penetration through the silicide occurs above a certain implant energy, while outdiffusion from the silicide is observed to be somewhat inhibited. Electrical characterisation of the PMOS devices fabricated has shown that they have excellent device characteristics and are comparable to more conventionally fabricated devices
Keywords
MOS integrated circuits; VLSI; boron; ion implantation; p-n homojunctions; semiconductor doping; semiconductor technology; titanium compounds; device characteristics; low-resistance junctions; shallow p-n junctions; silicides; spreading resistance measurement;
fLanguage
English
Journal_Title
Circuits, Devices and Systems, IEE Proceedings G
Publisher
iet
ISSN
0956-3768
Type
jour
Filename
99506
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