DocumentCode
1271340
Title
Photoelectrochemical Liftoff of Patterned Sapphire Substrate for Fabricating Vertical Light-Emitting Diode
Author
Hsieh, Chieh ; Chen, Horng-Shyang ; Liao, Che-Hao ; Chen, Chih-Yen ; Lin, Chun-Han ; Lin, Cheng-Hung ; Ting, Shao-Ying ; Yao, Yu-Feng ; Chen, Hao-Tsung ; Kiang, Yean-Woei ; Yang, Chih-Chung
Author_Institution
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
Volume
24
Issue
19
fYear
2012
Firstpage
1775
Lastpage
1777
Abstract
A low-cost large-area effective sapphire substrate liftoff method based on the photoelectrochemical (PEC) etching technique is demonstrated. By preparing patterned sapphire substrate (PSS) with 1-D periodic grooves and an epitaxial structure with the grooves preserved to form tunnels, PEC electrolyte can flow along the tunnels to etch the bottom of the GaN layer for separating the PSS from the wafer-bonded epitaxial layer. Assisted by the device isolation procedure, the PSS liftoff of a quarter-wafer sample can be completed in 8 min. After a smoothing process of the exposed N-face surface after liftoff, a vertical light-emitting diode (LED) is fabricated for comparing its characteristics with those of a conventional LED.
Keywords
III-V semiconductors; gallium compounds; light emitting diodes; sapphire; wide band gap semiconductors; Al2O3; GaN; PSS liftoff; device isolation procedure; patterned sapphire substrate; photoelectrochemical liftoff; quarter-wafer sample; smoothing process; time 8 min; vertical light-emitting diode; wafer-bonded epitaxial layer; Epitaxial growth; Epitaxial layers; Etching; Gallium nitride; Light emitting diodes; Substrates; Patterned sapphire substrate; photoelectrochemical etching; vertical light-emitting diode;
fLanguage
English
Journal_Title
Photonics Technology Letters, IEEE
Publisher
ieee
ISSN
1041-1135
Type
jour
DOI
10.1109/LPT.2012.2214476
Filename
6280618
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