Modeling the Impact of the Trench Depth on the Gate–Drain Capacitance in Power MOSFETs

Trench depth is important in low-voltage trench MOSFETs because it affects the switching losses through the gate-drain capacitance (C_GD). The dependence of C_GD on the trench depth is investigated by analytical modeling and experimental characterization. An analytical model that relates the trench depth, trench bottom oxide thickness, n^- layer doping, and drain voltage (VD) to C_GD is developed and validated by experimental measurements. Trench MOSFETs with thick bottom oxides have been fabricated with 1.3-, 1.5-, 1.7-, and 2-μm deep trenches. CV measurements show that C_GD is proportional to the trench depth at low VD and becomes increasingly independent of trench depth as VD is increased. The model is used to show that this is due to C_GD being dominated by the oxide capacitance at low VD and the depletion capacitance at high VD. The fact that the average thickness of the trench bottom oxide decreases as the trench depth increases (because of additional sidewall oxide overlapping the drain) means that the impact of the trench depth is the highest at low VD , where the depletion capacitance is ineffective.