Title :
Pipelined temporal difference imager
Author :
Gruev, V. ; Etienne-Cummings, R.
Author_Institution :
Dept. of Electr. & Comput. Eng., Johns Hopkins Univ., Baltimore, MD, USA
fDate :
3/28/2002 12:00:00 AM
Abstract :
A 189×182 active pixel sensor for temporal difference computation is presented. The temporal difference imager, fabricated in an AM1 0.5 μm process, contains in-pixel storage elements for previous and current frames. A pipelined architecture for difference readout is implemented, allowing >200 fps, 42 dB signal-to-noise ratio images and 8-bit precision of the difference image. The chip consumes 30 mW at 50 fps from a 5 V power supply
Keywords :
CMOS image sensors; digital readout; high-speed integrated circuits; image segmentation; pipeline processing; 0.5 micron; 182 pixel; 189 pixel; 30 mW; 34398 pixel; 5 V; AM1 0.5 μm process; CMOS active pixel sensor; difference image; difference readout; high-speed computation; in-pixel storage elements; pipelined architecture; pipelined temporal difference imager; segmentation algorithms; signal-to-noise ratio images; temporal difference computation;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:20020158
