Title :
40Gbit/s master-slave D-type flip-flop in InP DHBT technology
Author :
Kasbari, A. ; André, Ph ; Godin, J. ; Konczykowska, A.
Author_Institution :
OPTO + Alcatel R&I, Marcoussis, France
fDate :
3/28/2002 12:00:00 AM
Abstract :
A D-type flip-flop (MS D-FF) fabricated in a self-aligned InP DHBT technology is presented. 40 Gbit/s on-wafer measurements (limited by measurement setup) show good rise/fall times, low time jitter, as well as important regenerating capabilities. Some important design aspects are highlighted
Keywords :
III-V semiconductors; flip-flops; heterojunction bipolar transistors; indium compounds; 40 Gbit/s; InP; circuit design; fall time; master-slave D-type flip-flop; on-wafer measurement; regenerating capability; rise time; self-aligned InP DHBT technology; time jitter;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:20020241
