• DocumentCode
    1271981
  • Title

    Directions in DSP processors

  • Author

    Ahmed, Hassan M.

  • Author_Institution
    Dept. of Electr., Comput. & Syst. Eng., Boston Univ., MA, USA
  • Volume
    8
  • Issue
    8
  • fYear
    1990
  • fDate
    10/1/1990 12:00:00 AM
  • Firstpage
    1420
  • Lastpage
    1427
  • Abstract
    The evolution of single-chip digital signal-processor (DSP) architectures is discussed. It is argued that multiple arithmetic units and functionally enhanced arithmetic units are promising directions for further evolution of the datapath architecture. Candidate structures are defined, and the operation of popular DSP benchmarks on these structures is demonstrated
  • Keywords
    VLSI; computerised signal processing; digital arithmetic; digital signal processing chips; DSP benchmarks; VLSI; functionally enhanced arithmetic units; multiple arithmetic units; single-chip digital signal-processor; Arithmetic; Computer architecture; Data structures; Digital signal processing; Digital signal processing chips; Digital signal processors; Hardware; Signal processing; Signal processing algorithms; Very large scale integration;
  • fLanguage
    English
  • Journal_Title
    Selected Areas in Communications, IEEE Journal on
  • Publisher
    ieee
  • ISSN
    0733-8716
  • Type

    jour

  • DOI
    10.1109/49.62820
  • Filename
    62820
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1271981