DocumentCode
1272451
Title
History-aware, resource-based dynamic scheduling for heterogeneous multi-core processors
Author
Jooya, A.Z. ; Baniasadi, Amirali ; Analoui, Morteza
Author_Institution
Comput. Eng. Dept., Iran Univ. of Sci. & Technol., Tehran, Iran
Volume
5
Issue
4
fYear
2011
fDate
7/1/2011 12:00:00 AM
Firstpage
254
Lastpage
262
Abstract
The authors introduce a history-aware, resource-based dynamic (or simply HARD) scheduler for heterogeneous chip multi-processors (CMPs). HARD relies on recording application resource utilisation and throughput to adaptively change cores for applications during runtime. The authors show that HARD can be configured to achieve both performance and power improvements and compare HARD to an alternative dynamic scheduler and a static scheduler to provide better understanding.
Keywords
microprocessor chips; multiprocessing systems; performance evaluation; processor scheduling; CMP; HARD; application resource utilisation; heterogeneous chip multiprocessors; heterogeneous multicore processors; history-aware resource-based dynamic scheduling; performance improvements; power improvements;
fLanguage
English
Journal_Title
Computers & Digital Techniques, IET
Publisher
iet
ISSN
1751-8601
Type
jour
DOI
10.1049/iet-cdt.2009.0045
Filename
5953945
Link To Document