DocumentCode :
1272936
Title :
Fast settling PLL frequency synthesizer utilizing the frequency detector method speedup circuit
Author :
Sumi, Yasuaki ; Obote, Shigeki ; Narai, Kenta ; Tsuda, Kazutoshi ; Syoubu, Kouichi ; Fukui, Yutaka
Author_Institution :
Tottori Sanyo Electr. Co., Japan
Volume :
43
Issue :
3
fYear :
1997
fDate :
8/1/1997 12:00:00 AM
Firstpage :
550
Lastpage :
558
Abstract :
We propose two items for the fast frequency settling in the phase locked loop (PLL) frequency synthesizer. One is a PLL frequency synthesizer utilizing a frequency detector method speedup circuit (FDMSC). From the experimental results, it is observed that fast frequency settling can be achieved. The other is a shortcut lowpass filter (LPF) method with the FDMSC in the PLL frequency synthesizer. The frequency settling time has been speeded up further by changing the time constant of the LPF to a smaller value only in the rising condition
Keywords :
detector circuits; frequency synthesizers; land mobile radio; low-pass filters; phase locked loops; experimental results; fast frequency settling; fast settling PLL frequency synthesizer; frequency detector method speedup circuit; frequency settling time; lowpass filter; mobile radio communications systems; phase locked loop; time constant; Detectors; Filters; Frequency conversion; Frequency synthesizers; Land mobile radio; Phase locked loops; Phase noise; Pulse circuits; Timing; Voltage-controlled oscillators;
fLanguage :
English
Journal_Title :
Consumer Electronics, IEEE Transactions on
Publisher :
ieee
ISSN :
0098-3063
Type :
jour
DOI :
10.1109/30.628676
Filename :
628676
Link To Document :
بازگشت