An area effective 1-chip QAM LSI for digital CATV

We have developed a single, standard cell LSI equipped with a QAM (quadrature amplitude modulation) demodulator, a FEC (forward error correction) decoder, and AD/DA converters. The most important features of our LSI are its very small area and low power. In addition, this design can be used as a core module in an LSI library. The QAM demodulator has four modes of operations: 4, 16, 32, and 64 mode. The QAM demodulation is performed entirely in the digital domain. The FEC decoder includes frame synchronization, convolutional deinterleaving, RS (Reed-Solomon) decoding, and descrambling. We have achieved a small area and low power by using the following three methods. First, we adopted an ESGDD (enhanced stop & go decision-directed) algorithm as an AFC (automatic frequency control)/APC (automatic phase control) algorithm. The ESGDD algorithm which we developed based on the SGDD (stop & go decision-directed) algorithm which is a modified LMS (least mean square) algorithm, that is generally used for equalization. This new algorithm does not need an NCO (numerically controlled oscillator) operation which is usually indispensable when performing the AFC/APC algorithm. Next, we took advantage of the SGDD algorithm´s sub-sampling method to perform equalization. This method can reduce the amount of the equalizing calculation. Finally, we optimized the EAB (Euclid algorithm block) in the RS decoding block, which lead to the reduction needed to perform the number of steps of the RS decoding