• DocumentCode
    1273178
  • Title

    A Quasi-Analytical Model for Double-Gate Tunneling Field-Effect Transistors

  • Author

    Pan, Andrew ; Chui, Chi On

  • Author_Institution
    Dept. of Electr. Eng., Univ. of California, Los Angeles, CA, USA
  • Volume
    33
  • Issue
    10
  • fYear
    2012
  • Firstpage
    1468
  • Lastpage
    1470
  • Abstract
    Tunneling field-effect transistors (TFETs) are being widely investigated as a post-CMOS technology; however, despite significant experimental efforts, no quantitatively accurate device models are available. We derive an expression which provides the complete current characteristics of the double-gate TFET and demonstrate its agreement with simulation. This model will be useful in the design and circuit analysis of TFETs.
  • Keywords
    CMOS integrated circuits; field effect transistors; semiconductor device models; tunnel transistors; TFET design; circuit analysis; double-gate TFET; double-gate tunneling field-effect transistors; post-CMOS technology; quasianalytical device model; Analytical models; Doping; Electric potential; Logic gates; Semiconductor process modeling; Transistors; Tunneling; Double gate (DG); tunnel field-effect transistor (TFET); tunneling;
  • fLanguage
    English
  • Journal_Title
    Electron Device Letters, IEEE
  • Publisher
    ieee
  • ISSN
    0741-3106
  • Type

    jour

  • DOI
    10.1109/LED.2012.2208933
  • Filename
    6286986
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1273178