Title :
Design and implementation of a Grand Alliance HDTV receiver prototype
Author :
Choi, Kwonhue ; Jung, Minsoo ; Lee, Wonho ; Cheun, Kyungwhoon ; Won, Kwangho
Author_Institution :
Dept. of Electron. & Electr. Eng., Pohang Univ. of Sci. & Technol., South Korea
fDate :
8/1/1997 12:00:00 AM
Abstract :
A demodulator for the Grand Alliance digital HDTV receiver is designed with hardware efficient algorithms and a prototype is implemented. The implemented prototype contains all the required functions for baseband demodulation. Simple and fast polarity compensation algorithm for the bi-stable frequency and phase locked loop (FPLL), hardware efficient algorithms for segment synchronization, symbol timing recovery, channel equalization and the phase/gain noise tracking loop are of special interest. Experimental results are presented and the proper operation of the implemented functions is verified
Keywords :
demodulation; demodulators; digital phase locked loops; digital television; high definition television; synchronisation; television receivers; Grand Alliance; bistable FPLL; channel equalization; digital HDTV receiver prototype; experimental results; fast polarity compensation algorithm; frequency/phase locked loop; hardware efficient algorithms; phase/gain noise tracking loop; receiver design; segment synchronization; symbol timing recovery; Algorithm design and analysis; Baseband; Demodulation; Frequency synchronization; HDTV; Hardware; Phase locked loops; Phase noise; Prototypes; Timing;
Journal_Title :
Consumer Electronics, IEEE Transactions on
