DocumentCode :
1273856
Title :
Modified four-step block-matching algorithm efficient for hardware implementation
Author :
Lee, Dong-Ho
Author_Institution :
Sch. of Electr. & Comput. Eng., Hanyang Univ., Ansan, South Korea
Volume :
35
Issue :
19
fYear :
1999
fDate :
9/16/1999 12:00:00 AM
Firstpage :
1622
Lastpage :
1623
Abstract :
A new fast block-matching algorithm, the modified four-step search (MFSS) algorithm, is presented. Simulation results and hardware implementation results designed using VHDL show that MFSS has a better performance and is more suitable for hardware realisation than the existing fast algorithms
Keywords :
image matching; motion estimation; VHDL; fast block-matching algorithm; hardware implementation; modified four-step block-matching algorithm; modified four-step search algorithm;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el:19991147
Filename :
807029
Link To Document :
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