A unified systolic array for discrete cosine and sine transforms

A linear systolic array for the discrete cosine transform, discrete sine transform, and their inverses is developed. It generates the transform kernel values recursively. Compared to the scheme with the transform kernel values prestored in memory either inside or outside each processing element, the clock period is shortened by a memory access time. In addition, the array pays no cost for prestorage. The systolic array has the advantages of pipelinability, regularity, locality, and scalability, making it quite suitable for VLSI signal processing