DocumentCode :
1275204
Title :
A fast offset-free sample-and-hold circuit
Author :
Wang, Fong-Jim ; Temes, Gabor C.
Author_Institution :
Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA
Volume :
23
Issue :
5
fYear :
1988
fDate :
10/1/1988 12:00:00 AM
Firstpage :
1270
Lastpage :
1272
Abstract :
A novel circuit technique is presented which uses a CMOS cascode inverter as the buffer to realize an offset-free sample-and-hold stage. This circuit can achieve high-speed operation without requiring high slew rate. Experimental results are given to demonstrate the potential advantages of the scheme
Keywords :
CMOS integrated circuits; sample and hold circuits; CMOS cascode inverter; buffer; fast circuit; high-speed operation; offset-free; sample-and-hold circuit; Capacitance; Clocks; DC generators; Inverters; Switched capacitor circuits; Switches; Switching circuits; Voltage;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/4.5956
Filename :
5956
Link To Document :
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