DocumentCode :
1275260
Title :
Dynamic snap-back induced programming failure in stacked gate flash EEPROM cells and efficient remedying technique
Author :
Quan, Wuyun ; Cho, Myung Kwan ; Kim, Dae M.
Author_Institution :
Dept. of Electron. & Electr. Eng., Pohang Univ. of Sci. & Technol., South Korea
Volume :
46
Issue :
12
fYear :
1999
fDate :
12/1/1999 12:00:00 AM
Firstpage :
2340
Lastpage :
2343
Abstract :
A new kind of programming failure is reported in stacked gate Flash EEPROM cells and its remedying scheme is presented. The failure is observed under typical bit line (B/L) disturbance bias conditions but is different from the case of the drain turn-on induced leakage current over-burdening the charge pumping. Rather, its root cause is identified for the first time to be the dynamic snap back breakdown operative in the memory cell. This snap-back induced programming failure is shown effectively mitigated with the use of an appropriate series resistance in the source loop of the memory cell. The remedying role of the source series resistance is discussed
Keywords :
PLD programming; failure analysis; flash memories; integrated circuit reliability; semiconductor device breakdown; bit line disturbance bias conditions; dynamic snap back breakdown; dynamic snap-back induced programming failure; memory cell source loop; remedying scheme; series resistance; source series resistance; stacked gate flash EEPROM cells; Charge pumps; Dynamic programming; EPROM; Electric breakdown; Failure analysis; Helium; Leakage current; Nonvolatile memory; Semiconductor memory; Voltage;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/16.808077
Filename :
808077
Link To Document :
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