Title :
A Novel Moment Based Framework for Accurate and Efficient Static Timing Analysis
Author :
Shebaita, Ahmed ; Das, Debasish ; Petranovic, Dusan ; Ismail, Yehea
Author_Institution :
Magma Design Autom., San Jose, CA, USA
Abstract :
A novel methodology for accurate and efficient static timing analysis is presented in this paper. Our methodology uses the traditional cell library table structure with one modification. The cell library tables are filled with the gate output signal moments instead of the gate output 50% delay and output slew. Using only few moments gives much better accuracy and visibility for the gate output waveform than using the time domain information. Simple convolution of the gate output moments with the interconnect moments yields the signal moments at the stage output. The parameters of the gate input signal, which are used for the table access of the successive stage, are directly computed from the predecessor stage output moments using the closed form expressions without having to explicitly transform the frequency domain moments to time domain. Thus, the interconnects and the gates are treated in a unified moment-based homogeneous framework. The proposed approach inherits the classical cell library tables approach efficiency with even reduced computation complexities. As compared to the classical cell library table approach, the proposed approach accounts for the increasingly nonlinear and non-monotonic waveform shapes which are prohibitively difficult to represent in the classical approaches. In contrary to the classical approaches, increasing the accuracy in the novel approach is made flexible and can be achieved by simply using more moments. To illustrate the concept and prove its merits, multiple examples are presented with 2-3 moments which maintain accuracy within 1%-3% as compared to SPICE.
Keywords :
electronic engineering computing; frequency-domain analysis; integrated circuit design; logic design; program diagnostics; cell library table structure; convolution; gate output waveform; moment based framework; static timing analysis; Capacitance; Delay; Integrated circuit interconnections; Libraries; Logic gates; SPICE; Moment order reduction; static timing analysis;
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
DOI :
10.1109/TCAD.2011.2121110