DocumentCode
1275551
Title
Hierarchical design and test of integrated microsystems
Author
Mukherjee, Tridib ; Fedder, Gary K. ; Blanton, R.D.
Author_Institution
Carnegie Mellon Univ., Pittsburgh, PA, USA
Volume
16
Issue
4
fYear
1999
Firstpage
18
Lastpage
27
Abstract
This article presents emerging results of an integrated mixed-domain design methodology similar to the mixed-signal design methodologies in the VLSI community. This methodology is based on a hierarchical mixed-domain design representation and includes a Spice-like nodal simulation environment, an “on-the-fly” component layout-synthesis module, a layout extractor for design verification, and a fault model generator for test methodology development
Keywords
logic CAD; logic testing; Spice-like nodal simulation; design verification; fault model generator; integrated microsystems; integrated mixed-domain design; mixed-domain design representation; test methodology development; CMOS process; CMOS technology; Chemical technology; Design methodology; Etching; Micromachining; Micromechanical devices; Microstructure; Silicon; Testing;
fLanguage
English
Journal_Title
Design & Test of Computers, IEEE
Publisher
ieee
ISSN
0740-7475
Type
jour
DOI
10.1109/54.808200
Filename
808200
Link To Document