Title :
Two-Phase RTD-CMOS Pipelined Circuits
Author :
Nunez, Juan ; Avedillo, María J. ; Quintana, José M.
Author_Institution :
Inst. de Microelectron. de Sevilla (IMSE-CNM-CSIC), Univ. of Sevilla, Sevilla, Spain
Abstract :
MOnostable-BIstable Logic Element (MOBILE) networks can be operated in a gate-level pipelined fashion (nanopipeline) allowing high through output. Resonant tunneling diode (RTD)-based MOBILE nanopipelined circuits have been reported using different clock schemes including a four-phase strategy and a single-phase clock scheme. In particular, significant power advantages of single-phase RTD-CMOS MOBILE circuits over pure CMOS have been shown. This letter compares the RTD-CMOS realizations using a single clock and a novel two-phase clock solution. Significant superior robustness and performance in terms of power and area are obtained for the two-phase implementations.
Keywords :
CMOS logic circuits; pipeline processing; resonant tunnelling diodes; MOBILE networks; RTD-CMOS realizations; clock schemes; four-phase strategy; gate-level pipelined fashion; monostable-bistable logic element networks; nanopipeline; resonant tunneling IEEE diode-based MOBILE nanopipelined circuits; single-phase RTD-CMOS MOBILE circuits; single-phase clock scheme; two-phase RTD-CMOS pipelined circuits; two-phase clock solution; two-phase implementations; CMOS integrated circuits; Clocks; Inverters; Logic gates; Mobile communication; Robustness; Transistors; Emerging technologies; logic circuits; nanopipe-line; power efficiency; resonant tunneling diode (RTD);
Journal_Title :
Nanotechnology, IEEE Transactions on
DOI :
10.1109/TNANO.2012.2213839