DocumentCode :
1276483
Title :
A 400-Ms/s frequency translating bandpass sigma-delta modulator
Author :
Tao, Hai ; Khoury, John M.
Author_Institution :
Dept. of Electr. Eng., Columbia Univ., New York, NY, USA
Volume :
34
Issue :
12
fYear :
1999
fDate :
12/1/1999 12:00:00 AM
Firstpage :
1741
Lastpage :
1752
Abstract :
A bandpass Σ-Δ modulator is described in this paper that uses frequency translation inside the Σ-Δ modulator loop to take advantage of the attributes of both continuous-time and discrete-time circuits. A CMOS direct-conversion modulator digitizes a 200 kHz intermediate-frequency signal centered at 100 MHz and produces baseband I/Q outputs with a peak signal-to-noise ratio of 54 dB. Images due to I/Q mismatches are suppressed by 50 dB. This 0.35-μm digital CMOS chip operates from a 2.7/3.3-V supply, dissipates 330 mW, and occupies 3.2 mm2
Keywords :
CMOS integrated circuits; sigma-delta modulation; 0.35 micron; 100 MHz; 2.7 V; 200 kHz; 3.3 V; 330 mW; CMOS digital chip; IF signal digitization; bandpass sigma-delta modulator; continuous-time circuit; direct-conversion modulator; discrete-time circuit; frequency translation; signal-to-noise ratio; Band pass filters; Baseband; Computed tomography; Delta-sigma modulation; Demodulation; Digital modulation; Feedback loop; Frequency modulation; Radio frequency; Switching circuits;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/4.808899
Filename :
808899
Link To Document :
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