Power4 system design for high reliability

Author

Bossen, Douglas C. ; Tendler, Joel M. ; Reick, Kevin

Author_Institution

Server Group, IBM Corp., Austin, TX, USA

Volume

22

Issue

2

fYear

2002

Firstpage

16

Lastpage

24

Abstract

The Power4 is an integrated system on a chip (SoC) designed for systems that will initially target enterprise Unix customers and, at a later date, O/S 400 customers. Power4 systems are servers comprised of several Power4 chips. To achieve reliability goals, Power4 system design incorporates fault tolerance throughout the hardware, firmware and operating system. Together, these system components provide concurrent and deferred maintenance, multi-level recovery from errors and run-time diagnostics.

Keywords

CMOS integrated circuits; application specific integrated circuits; computer maintenance; fault diagnosis; fault tolerant computing; firmware; network servers; operating systems (computers); system monitoring; system recovery; O/S 400 customers; Power4 chips; Power4 system design; concurrent maintenance; deferred maintenance; enterprise Unix customers; fault tolerance; firmware; integrated system on chip; multi-level error recovery; operating systems; reliability; run-time diagnostics; servers; Art; Availability; Chip scale packaging; Fault tolerance; Fault tolerant systems; Hardware; Power system interconnection; Power system reliability; Switches; System-on-a-chip;

fLanguage

English

Journal_Title

Micro, IEEE

Publisher

ieee

ISSN

0272-1732

Type

jour

DOI

10.1109/MM.2002.997876

Filename

997876