A novel clock recovery circuit for fully monolithic integration

Author

Murata, Koichi ; Otsuji, Taiichi

Author_Institution

NTT Network Innovation Labs., Kanagawa, Japan

Volume

47

Issue

12

fYear

1999

fDate

12/1/1999 12:00:00 AM

Firstpage

2528

Lastpage

2533

Abstract

This paper presents a novel clock recovery circuit that offers fully monolithic integration. The circuit consists of just the transistor gates of an exclusive OR for an edge-detector and a free-running T-type flip-flop for a high-Q oscillator. As the first proof of the concept, we assemble a circuit using discrete integrated circuits and confirm half-rate clock extraction from an nonreturn to zero data stream input. In order to examine feasibility of the circuit in practical use, we assemble a clock and data recovery circuit. The circuit exhibits stable operation with the bit-error rate of less than 1×10^-12

Keywords

HEMT integrated circuits; MESFET integrated circuits; circuit stability; field effect digital integrated circuits; flip-flops; high-speed integrated circuits; injection locked oscillators; optical communication equipment; synchronisation; GaAs MESFET IC; InP HEMT EX-OR IC; bit-error rate; clock recovery circuit; clock/data recovery circuit; data recovery circuit; edge-detector; exclusive OR; free-running T-type flip-flop; fully monolithic integration; half-rate clock extraction; high-Q oscillator; injection locking; nonreturn to zero data stream input; optical transmission receivers; stable operation; transistor gates; Assembly; Clocks; Cyclic redundancy check; Flip-flops; Monolithic integrated circuits; Optical receivers; Optical signal processing; Oscillators; Phase locked loops; Resonator filters;

fLanguage

English

Journal_Title

Microwave Theory and Techniques, IEEE Transactions on

Publisher

ieee

ISSN

0018-9480

Type

jour

DOI

10.1109/22.809002

Filename

809002