• DocumentCode
    1278284
  • Title

    N+/P junction leakage characteristics of Co salicide process for 0.15 μm CMOS devices

  • Author

    Lee, Key-Min ; Choi, Chel-Jong ; Lee, Joo-Hyoung ; Seong, Tae-Yeon ; Park, Young-Jin ; Hong, Sung-Kwon ; Ahn, Jae-Gyung ; Lee, Hi-Deok

  • Author_Institution
    Memory Res. & Dev. Div., Hynix Semicond. Co. Ltd., Choongbuk, South Korea
  • Volume
    49
  • Issue
    5
  • fYear
    2002
  • fDate
    5/1/2002 12:00:00 AM
  • Firstpage
    937
  • Lastpage
    939
  • Abstract
    We have proposed that As dopants in the n+/p active region are redistributed during Co salicidation process, especially in the active edge area in contact with the field oxide. The dopant redistribution has been verified through a novel two-dimensional (2-D) dopant profiling method, i.e., the transmission electron microscope (TEM) combined with selective chemical etching. It was shown that As dopants move down from the silicide layer into the junction area, which results in the deeper junction compared with nonsilicided junction. On the contrary, the junction profile behavior at the active edge area is completely opposite to that inside active region. That is, the junction profile is bent upward at the active edge, which results in the increase or even fail of junction leakage current of perimeter intensive diodes due to the decreased distance from the silicide bottom to the junction depth. Therefore, the dopant redistribution at the n+/p active edge should be reduced or suppressed for reliable shallow silicided junction formation
  • Keywords
    CMOS integrated circuits; cobalt compounds; doping profiles; etching; integrated circuit metallisation; leakage currents; p-n junctions; transmission electron microscopy; 0.15 micron; As dopant redistribution; CMOS device; Co salicide process; CoSi2-Si:As; N+/P junction; active edge; leakage current; perimeter intensive diode; selective chemical etching; shallow silicided junction; transmission electron microscopy; two-dimensional dopant profiling; CMOS process; CMOS technology; Fabrication; Ion implantation; Leakage current; Materials science and technology; Silicidation; Silicides; Substrates; Testing;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/16.998607
  • Filename
    998607