Title :
Search pruning techniques in SAT-based branch-and-bound algorithms for the binate covering problem
Author :
Manquinho, Vasco M. ; Marques-Silva, João P.
Author_Institution :
Inst. Superior Tecnico, Tech. Univ. Lisbon, Portugal
fDate :
5/1/2002 12:00:00 AM
Abstract :
Covering problems are widely used as a modeling tool in electronic design automation. Recent years have seen dramatic improvements in algorithms for the unate/binate covering problem (UCP/BCP). Despite these improvements, BCP is a well-known computationally hard problem with many existing real-world instances that currently are hard or even impossible to solve. In this paper we apply search pruning techniques from the Boolean satisfiability domain to branch-and-bound algorithms for BCP. Furthermore, we generalize these techniques, in particular the ability to infer and record new constraints from conflicts and the ability to backtrack nonchronologically, to situations where the branch-and-bound BCP algorithm backtracks due to bounding conditions. Experimental results, obtained on representative real-world instances of the UCP/BCP, indicate that the proposed techniques are effective and can provide significant performance gains for specific classes of instances
Keywords :
backtracking; computability; electronic design automation; logic CAD; tree searching; Boolean satisfiability domain; SAT-based branch-and-bound algorithms; binate covering problem; bounding conditions; computationally hard problem; constraints; electronic design automation; logic synthesis; nonchronological backtracking; performance gains; propositional satisfiability; search pruning techniques; unate/binate covering problem; Boolean functions; Business continuity; Computer science; Electronic design automation and methodology; Encoding; Helium; Logic design; Minimization; Partitioning algorithms; Performance gain;
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on