DocumentCode :
1278543
Title :
CDM Simulation Based on Tester, Package and Full Integrated Circuit Modeling: Case Study
Author :
Abessolo-Bidzo, Dolphin ; Smedes, Theo ; Huitsing, Albert Jan
Author_Institution :
NXP Semicond., Nijmegen, Netherlands
Volume :
59
Issue :
11
fYear :
2012
Firstpage :
2869
Lastpage :
2875
Abstract :
The electrostatic discharge (ESD) sensitivity of ICs with respect to the charged-device model (CDM) is strongly dependent on the IC package, the substrate resistivity, and the effectiveness of the ESD protection network. This paper presents a case study of predictive CDM circuit simulation method based on the tester, package, and full IC modeling approach.
Keywords :
BiCMOS integrated circuits; circuit simulation; electrostatic discharge; integrated circuit modelling; integrated circuit packaging; integrated circuit testing; ESD protection network; ESD sensitivity; IC package; charged-device model; electrostatic discharge sensitivity; full integrated circuit modeling; package-based CDM simulation; predictive CDM circuit simulation method; substrate resistivity; tester-based CDM simulation; Capacitance; Discharges (electric); Electrostatic discharges; Integrated circuit modeling; Logic gates; Substrates; Bipolar and complementary metal oxide semiconductor (BiCMOS) integrated circuits (ICs); SPICE simulations; electrostatic discharge (ESD);
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/TED.2012.2213173
Filename :
6294437
Link To Document :
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