Synthesis of symmetric and nonsymmetric lattice digital filters which are free of constant-input limit cycles

Author

Diniz, Paulo S R ; Sarcinelli, Mario

Author_Institution

Programa de Engenharia Electr. COPPE/Federal Univ. of Rio de Janeiro, Brazil

Volume

39

Issue

4

fYear

1991

fDate

4/1/1991 12:00:00 AM

Firstpage

971

Lastpage

975

Abstract

Syntheses procedures for lattice digital filter structures which can be free of constant-input limit cycles are presented. As a result, the realizations derived, in most cases, maintain the desirable properties of the original lattice while being free of constant-input limit cycles. The symmetric lattice structures, which are amenable to efficient VLSI implementation, are considered regarding their freedom from zero-input and constant-input limit cycles. The pertaining syntheses procedures are presented. Experimental results are included to compare the several realizations discussed with respect to output roundoff noise and multiplier coefficients sensitivity

Keywords

VLSI; digital filters; network synthesis; VLSI; filters synthesis; multiplier coefficients sensitivity; nonsymmetric lattice digital filters; output roundoff noise; symmetric lattice digital filters; Digital filters; Eigenvalues and eigenfunctions; Equations; Lattices; Limit-cycles; Pipeline processing; Signal synthesis; Transfer functions; Very large scale integration;

fLanguage

English

Journal_Title

Signal Processing, IEEE Transactions on

Publisher

ieee

ISSN

1053-587X

Type

jour

DOI

10.1109/78.80926

Filename

80926