• DocumentCode
    1279271
  • Title

    Efficient realization structure of the a priori lattice-ladder recursive least squares algorithm

  • Author

    Petropulu, Athina P. ; Nikias, Chrysostomos L. ; Proakis, John G.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Northeastern Univ., Boston, MA, USA
  • Volume
    39
  • Issue
    4
  • fYear
    1991
  • fDate
    4/1/1991 12:00:00 AM
  • Firstpage
    992
  • Lastpage
    996
  • Abstract
    An efficient pipelined realization structure of the a priori lattice-ladder least squares multichannel algorithm is introduced. The structure is shown to exhibit great modularity and high parallelism. The architecture is evaluated for cost and data throughput delay assuming pipelined operations. It is demonstrated that the throughput rate of the structure is O(1) and the cost is O(l2 N), where l is the number of channels and N is the order of the filter
  • Keywords
    computerised signal processing; digital signal processing chips; least squares approximations; parallel algorithms; pipeline processing; cost; data throughput delay; lattice-ladder recursive least squares; modular structure; multichannel algorithm; parallel structure; pipelined structure; throughput rate; Array signal processing; Costs; Delay; Filters; Least squares methods; Parallel processing; Roundoff errors; Signal processing algorithms; Throughput; Very large scale integration;
  • fLanguage
    English
  • Journal_Title
    Signal Processing, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1053-587X
  • Type

    jour

  • DOI
    10.1109/78.80934
  • Filename
    80934