DocumentCode :
1279735
Title :
Elimination of one dc voltage source in stacked multicell converters
Author :
Khoshkbar Sadigh, Arash ; Dargahi, Vahid ; Pahlavani, M.R.A. ; Shoulaie, Abbas
Author_Institution :
Depts. of Electr. Eng. & Comput. Sci., Univ. of California-Irvine, Irvine, CA, USA
Volume :
5
Issue :
6
fYear :
2012
fDate :
7/1/2012 12:00:00 AM
Firstpage :
644
Lastpage :
658
Abstract :
This study presents a novel configuration for stacked multicell (SM) converters. The main advantage of the proposed converter, in comparison with the conventional one, is that the number of required dc voltage sources is reduced from two to one in the proposed topology which results in decreasing the cost and size of the converter. This progress is achieved by adding four low-frequency switches to the conventional configuration of SM converter whereas the number and voltage rating of high-frequency switches and clamping capacitors as well as the number of high-frequency switchings during a full cycle are kept constant. This converter is controlled by phase shifted carrier-sinusoidal pulse width modulation technique; therefore the self-balancing phenomenon of clamping capacitors´ voltages is maintained. This study also presents a state-space representation model to analyse the dynamic of clamping capacitor´s self-balancing phenomenon in the proposed SM converter by obtaining the switching instants of the pulse width modulation in terms of the Kapteyn series. Numerical solution of obtained state-space representation model of the proposed converter and simulation results as well as measurements taken from an experimental set-up are presented in order to validate the effectiveness and advantages of the proposed configuration as well as its control strategy and state-space model.
Keywords :
PWM power convertors; capacitors; clamps; power semiconductor switches; state-space methods; Kapteyn series; SM converter cost; SM converter size; clamping capacitor; dc voltage sources; high-frequency switch; low- frequency switch; phase shifted carrier-sinusoidal pulse width modulation technique; self-balancing phenomenon; stacked multicell converter; state-space representation model; voltage rating;
fLanguage :
English
Journal_Title :
Power Electronics, IET
Publisher :
iet
ISSN :
1755-4535
Type :
jour
DOI :
10.1049/iet-pel.2011.0320
Filename :
6294923
Link To Document :
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