Vertical GAAFETs for the Ultimate CMOS Scaling

Author

Yakimets, Dmitry ; Eneman, Geert ; Schuddinck, Pieter ; Trong Huynh Bao ; Bardon, Marie Garcia ; Raghavan, Praveen ; Veloso, Anabela ; Collaert, Nadine ; Mercha, Abdelkarim ; Verkest, Diederik ; Voon-Yew Thean, Aaron ; De Meyer, Kristin

Author_Institution

Imec, Leuven, Belgium

Volume

62

Issue

5

fYear

2015

fDate

May-15

Firstpage

1433

Lastpage

1439

Abstract

In this paper, we compare the performances of FinFETs, lateral gate-all-around (GAA) FETs, and vertical GAAFETs (VFETs) at 7-nm node dimensions and beyond. Comparison is done at ring oscillator level accounting not only for front-end of line devices but also for interconnects. It is demonstrated that FinFETs fail to maintain the performance at scaled dimensions, while VFETs demonstrate good scalability and eventually outperform lateral devices both in speed and power consumption. Lateral GAAFETs show better scalability with respect to FinFETs but still consume 35% more energy per switch than VFETs if made under 5-nm node design rules.

Keywords

CMOS analogue integrated circuits; MOSFET; integrated circuit interconnections; oscillators; power consumption; semiconductor device models; CMOS; FinFET; VFET; lateral devices; lateral gate-all-around FET; power consumption; ring oscillator; size 5 nm; vertical GAAFET; Capacitance; Electrodes; FinFETs; Layout; Logic gates; Performance evaluation; Resistance; Design technology cooptimization; FinFET; nanowire (NW); scaling; vertical gate-all-around FET (VFET); vertical gate-all-around FET (VFET).;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/TED.2015.2414924

Filename

7078860