• DocumentCode
    128059
  • Title

    EMI reduction by chip-package-board co-design

  • Author

    Kiyoshige, Sho ; Ichimura, Wataru ; Terasaki, Masahiro ; Kobayashi, Ryota ; Sudo, Toshio

  • Author_Institution
    Shibaura Inst. of Technol., Tokyo, Japan
  • fYear
    2014
  • fDate
    1-4 Sept. 2014
  • Firstpage
    946
  • Lastpage
    951
  • Abstract
    Electromagnetic radiation is always headachy issue in developing various electronic systems. Because electromagnetic radiation and interference (EMI) is very sensitive to signal routing and physical layout of power distribution network (PDN) in package and board as well as chip design. Therefore, chip-package co-design is becoming important by taking into account the total PDN impedance seen from the chip. Especially, parallel resonance peaks in the PDN due to the chip-package interaction induces the unwanted power supply fluctuation, and results in serious EMI troubles. In this paper, three test chips were designed with different on-chip PDN properties. These three chips were intended to have typical characteristics; oscillatory region and damped condition. Then, the effects of the total PDN impedance on EMI have been studied. In particular, anti-resonance peak was properly suppressed by establishing critical damping condition in chip-package-board co-design. EMI has been proved to be dramatically reduced by proper combination of on-chip capacitance, on-chip resistance and package inductance.
  • Keywords
    chip-on-board packaging; electromagnetic interference; electromagnetic waves; integrated circuit design; integrated circuit interconnections; integrated circuit testing; network routing; EMI reduction; EMI troubles; PDN impedance; antiresonance peak; chip design; chip-package interaction; chip-package-board codesign; electromagnetic interference; electromagnetic radiation; on-chip PDN properties; on-chip capacitance; on-chip resistance; oscillatory region; package inductance; power distribution network; power supply fluctuation; signal routing; test chips; Capacitance; Electromagnetic compatibility; Electromagnetic interference; Impedance; Inductance; Semiconductor device measurement; System-on-chip;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electromagnetic Compatibility (EMC Europe), 2014 International Symposium on
  • Conference_Location
    Gothenburg
  • Type

    conf

  • DOI
    10.1109/EMCEurope.2014.6931039
  • Filename
    6931039