Title :
Design of novel high side power MOSFET based on HVIC process
Author :
Xu, Y.Z. ; Hardikar, S. ; DeSouza, M.M. ; Cao, G.J. ; Narayanan, E.M.S.
Author_Institution :
Dept. of Electr. & Electron. Eng., De Montfort Univ., Leicester, UK
fDate :
10/14/1999 12:00:00 AM
Abstract :
A novel high side power MOSFET is presented, the design of which is based on a modified 600 V CMOS process developed for lateral power devices. Simulation results indicate that the blocking voltage is in excess of 550 V. A significant enhancement in the blocking voltage is realised by incorporating the source within an n-buffer layer. The improvement can be attributed to the increase in the `punch-through´ voltage of the vertical parasitic PNP transistor. The transient characteristic of turn on is also analysed
Keywords :
CMOS integrated circuits; power MOSFET; power integrated circuits; power semiconductor switches; 550 V; 600 V; HVIC process; blocking voltage; high side power MOSFET; lateral power devices; modified HV CMOS process; n-buffer layer; punch-through voltage; turn-on transient characteristic; vertical parasitic PNP transistor;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19991280
