Title :
A novel power efficient 8T SRAM cell
Author :
Sindwani, Ankush ; Saini, Shrikant
Author_Institution :
Sch. of VLSI Design & Embedded Syst., NIT Kurukshetra, Kurukshetra, India
Abstract :
As the technology is being scaled down leakage power is becoming an important contributing factor in total power dissipation of the circuit. So in the portable devices such as cell phones, laptops emphasis has to be given to reduce power consumption during active as well as standby mode. This paper presents certain leakage reduction techniques in 8T SRAM cell. The technology used is 90 nm. The results have been obtained using Cadence Virtuoso Tool. The results show significant reduction in power as compared to conventional cells without degrading the stability of the cell.
Keywords :
SRAM chips; leakage currents; low-power electronics; 8T SRAM cell; Cadence Virtuoso tool; active mode; cell phones; laptops; leakage power; leakage reduction techniques; power consumption; power dissipation; power efficiency; size 90 nm; standby mode; Leakage currents; Logic gates; MOSFET; Power demand; SRAM cells; Threshold voltage; Leakage Current; Stacking; Threshold Voltage;
Conference_Titel :
Engineering and Computational Sciences (RAECS), 2014 Recent Advances in
Conference_Location :
Chandigarh
Print_ISBN :
978-1-4799-2290-1
DOI :
10.1109/RAECS.2014.6799577
