• DocumentCode
    1282861
  • Title

    Three-dimensional simulation of HPCVD-linking continuum transport and reaction kinetics with topography simulation

  • Author

    Pyka, Wolfgang ; Fleischmann, Peter ; Haindl, Bernhard ; Selberherr, Siegfried

  • Author_Institution
    Inst. fur Mikroelektronik, Tech. Univ. Wien, Austria
  • Volume
    18
  • Issue
    12
  • fYear
    1999
  • fDate
    12/1/1999 12:00:00 AM
  • Firstpage
    1741
  • Lastpage
    1749
  • Abstract
    For wafer sizes in state of-the-art semiconductor manufacturing ranging up to 300 mm, the uniformity of processes across the wafer becomes a very important issue. We present a fully three-dimensional model for the feature scale simulation of continuum transport and reaction determined high-pressure chemical vapor deposition processes suitable for the investigation of such nonuniformities. The newly developed three-dimensional approach combines topography simulation, meshing, and finite element method tools, and allows simulations over arbitrary geometries such as structures resulting from nonuniform underlying physical vapor deposition films. This enables the examination of film profile variations across the wafer for multistep processes consisting of low- and high-pressure parts such as Ti/TiN/W plug-fills, Additionally, the model allows a very flexible formulation of the involved gas chemistry and surface reactions and can easily be extended to process chemistries including gas phase reactions of precursors as observed in deposition of silicon dioxide from tetraethylorthosilicate (TEOS). We show simulation examples for a tungsten deposition process, which is applied as last step in a Ti/TiN/W plug-fill. For filling of an L-shaped trench, we show the transition from transport to reaction limited process conditions
  • Keywords
    chemical vapour deposition; digital simulation; mesh generation; reaction kinetics; semiconductor process modelling; surface topography; 0 to 300 mm; HPCVD; L-shaped trench; Ti-TiN-W; continuum transport; feature scale simulation; film profile variations; finite element method tools; gas chemistry; meshing; multistep processes; plug-fill; reaction kinetics; semiconductor manufacturing; surface reactions; three-dimensional simulation; topography simulation; wafer sizes; Chemical vapor deposition; Chemistry; Finite element methods; Geometry; Manufacturing processes; Semiconductor device manufacture; Semiconductor device modeling; Solid modeling; Surfaces; Tin;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/43.811323
  • Filename
    811323