A Closed-Form Analytical Transient Response Model for On-Chip Distortionless Interconnect

This paper presents a closed-form analytical transient response model for an on-chip distortionless interconnect considering resistance/capacitance loads via solving a semi-infinite transmission line equation. As verified by the simulation results, this transient response model has high accuracy, which could be used to derive the characteristics of the transmitted signal for facilitating the design of the distortionless interconnect. Based on the model, the steady-state output voltage and the delay related to the interconnect have been analyzed.