• DocumentCode
    1283446
  • Title

    Error correction technique for multivalued MOS memory

  • Author

    Lee, Edward K. F. ; Gulak, P. Glenn

  • Author_Institution
    Dept. of Electr. Eng., Toronto Univ., Ont., Canada
  • Volume
    27
  • Issue
    15
  • fYear
    1991
  • fDate
    7/18/1991 12:00:00 AM
  • Firstpage
    1321
  • Lastpage
    1323
  • Abstract
    An error correction technique is proposed to increase the noise margin of a multivalued MOS memory. The stored voltage information is first converted to a binary representation. The noise margin of the store voltage is then increased by storing and comparing the least significant bits of the binary representation.
  • Keywords
    MOS integrated circuits; error correction; integrated memory circuits; binary representation; error correction technique; multivalued MOS memory; noise margin improvement; stored voltage information;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19910831
  • Filename
    81216
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1283446