Title :
Error correction technique for multivalued MOS memory
Author :
Lee, Edward K. F. ; Gulak, P. Glenn
Author_Institution :
Dept. of Electr. Eng., Toronto Univ., Ont., Canada
fDate :
7/18/1991 12:00:00 AM
Abstract :
An error correction technique is proposed to increase the noise margin of a multivalued MOS memory. The stored voltage information is first converted to a binary representation. The noise margin of the store voltage is then increased by storing and comparing the least significant bits of the binary representation.
Keywords :
MOS integrated circuits; error correction; integrated memory circuits; binary representation; error correction technique; multivalued MOS memory; noise margin improvement; stored voltage information;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19910831
